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Article Dans Une Revue Microelectronic Engineering Année : 2006

Critical failure ORC: Improving model accuracy through enhanced model generation

Résumé

Ensuring robust patterning after OPC is becoming more and more difficult due to the continuous reduction of layout dimensions and diminishing process windows associated with each successive lithographic generation. Lithographers must guarantee high imaging fidelity throughout the entire range of normal process variations. As a result, post-OPC verification methods have become indispensable tools for avoiding pattern printing issues. A post-OPC verification technique known as critical failure optical rule checking (CFORC) was recently introduced and has proven its efficiency for detecting potential printing issues through the entire process window [S.D. Shang et al., Proc. SPIE 5040 (2003); J. Belledent et al., Proc. SPIE 5377 (2004); A. previous termBorjonnext term et al., Proc. SPIE 5754 (2005)]. This methodology uses optical parameters from aerial image simulations at single process condition. A numerical model, build using support vector machine (SVM) principle [The Nature of Statistical Learning Theory, second ed., Springer, (1995)], correlates these optical parameters with experimental data taken throughout the process window to predict printing failures. This statistical method however leads to some false predictions. Although false predictions may be unavoidable in statistical methodologies, it is possible to lower their rate of occurrence. In this study, concentrated on contact layer patterning for the 90 nm node and the poly layer patterning for the 65 nm node, the accuracy of CFORC models is improved through several approaches: enhancing the normalization algorithm, optimization of fitting parameters and optimizing the parameter space coverage.

Dates et versions

hal-00023226 , version 1 (21-04-2006)

Identifiants

Citer

A. Borjon, J. Belledent, Y. Trouiller, K. Patterson, K. Lucas, et al.. Critical failure ORC: Improving model accuracy through enhanced model generation. Microelectronic Engineering, 2006, 83, Issues 4-9, pp.1017-1022. ⟨10.1016/j.mee.2006.01.034⟩. ⟨hal-00023226⟩
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