This study investigated the thermal performance of a packaging solution designed to manage the electrical isolation and cooling of high voltage (> 3300 V) SiC power semiconductor devices. The proposed packaging merges the ceramic substrate and the heat exchanger into a single component, streamlining the overall design. Specifically, a novel heat exchanger is developed for a multi-chip module (20 kV), utilizing a combination of jet impingement and channel-flow cooling techniques. Computational fluid dynamics (CFD) simulations and experimental validation are conducted on a multi-chip module to assess the thermal resistance of this new cooling solution. The results demonstrate a low thermal resistivity of 0.118 cm 2 K/W, indicating the potential for improved cooling performance in high voltage and power density semiconductor applications.