Influence of Different Peripheral Protections on the Breakover Voltage of a 4H-SiC GTO Thyristor
Résumé
4H-SiC asymmetrical gate turn-off (GTO) thyristors have been developed using a PP-NP + epitaxial layer structure, where P-is a 35 µm thick p-type drift layer doped at 5´10 14 cm-3. The process sequence uses plasma etching steps (ECR and RIE) in order to expose inter-digitated devices with a recessed gate structure. Knowing the difficulty in reaching the theoretical forward blocking capability of Vb = 6 kV, determined by numerical simulations using the finite element code MEDICI TM , three different device terminations were realized. The first and simplest termination used is a MESA etched down to 12 µm depth into the drift layer. Better performances were expected by using a combination of MESA and Junction Termination Extension (JTE), where implantation and anneal have to be precisely adjusted. Finally, Etched Guard Ring (EGR) terminations were realized etching five 2 µm wide grooves around the device periphery through the n-base layer. The electrical characteristics of the devices with all the three terminations are presented and discussed. The highest breakover voltage measured for mesa terminated devices amounts to 3.9 kV.
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