Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance - Archive ouverte HAL Access content directly
Journal Articles IEEE Transactions on Nanotechnology Year : 2020

Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance

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hal-03065940 , version 1 (13-10-2021)

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Attribution - NonCommercial - CC BY 4.0

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Muhammed Ceylan Morgül, L. Frontini, O. Tunali, Lorena Anghel, V. Ciriani, et al.. Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance. IEEE Transactions on Nanotechnology, 2020, pp.39-53. ⟨10.1109/TNANO.2020.3044017⟩. ⟨hal-03065940⟩
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