Emulating round-to-nearest-ties-to-zero "augmented" floating-point operations using round-to-nearest-ties-to-even arithmetic

The 2019 version of the IEEE 754 Standard for Floating-Point Arithmetic recommends that new “augmented” operations should be provided for the binary formats. These operations use a new “rounding direction”: round to nearest ties-to-zero. We show how they can be implemented using the currently available operations, using round-to-nearest ties-to-even with a partial formal proof of correctness.

Mots clés

Floating-point arithmetic Numerical reproducibility Rounding error analysis Rounding mode Error-free transforms Formal proof

Domaines

Autre [cs.OH] Arithmétique des ordinateurs

Fichier principal

Emulation-RN0-submitted.pdf (283.61 Ko)

aug_RN_to_RN0-coq.pdf (274.95 Ko)

aug_RN_to_RN0-coq.rtf (97.95 Ko)

Origine	Fichiers produits par l'(les) auteur(s)

Jean-Michel Muller : Connectez-vous pour contacter le contributeur

https://hal.science/hal-02137968

Soumis le : vendredi 18 octobre 2019-11:25:46

Dernière modification le : jeudi 28 novembre 2024-15:42:02

Dates et versions

hal-02137968 , version 1 (23-05-2019)

hal-02137968 , version 2 (15-10-2019)

hal-02137968 , version 3 (18-10-2019)

hal-02137968 , version 4 (13-03-2020)

Identifiants

HAL Id : hal-02137968 , version 3

Citer

Sylvie Boldo, Christoph Q. Lauter, Jean-Michel Muller. Emulating round-to-nearest-ties-to-zero "augmented" floating-point operations using round-to-nearest-ties-to-even arithmetic. 2019. ⟨hal-02137968v3⟩

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