Efficient Application Mapping on CGRAs based on Backward Simultaneous Scheduling/Binding and Dynamic Graph Transformations
Résumé
Mapping an application on a coarse grained reconfigurable architecture (CGRA) is a complex task which is still often completely or partially realized manually. This paper presents an automated synthesis flow based on simultaneous scheduling and binding steps. The proposed method uses a backward traversal of the formal model obtained after compilation and dynamically transforms it when needed. Our approach is compared with state of the art techniques and its interest is shown through the mapping of several applications from digital signal and image processing domain.
Mots clés
Routing
Space exploration
Dynamic scheduling
data flow graph
backward simultaneous scheduling-binding
dynamic graph transformations
application mapping
coarse grained reconfigurable architecture
automated synthesis flow
backward traversal
formal model
compilation
digital signal domain
image processing domain
CGRA
Coarse-Grained Reconfigurable Architecture (CGRA)
Mapping
Scheduling
Binding
Registers
Reconfigurable architectures
Electronic architecture
instrumentation
| Origine | Fichiers produits par l'(les) auteur(s) |
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