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Emerging Nanotechnology for integration of Nanostructures in Nanoelectronic devices

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Laurent Montès
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  • PersonId : 1040653
Barbara de Salvo
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Abstract

This chapter focuses on two emerging nanotechnologies developed to fabricate, organize and integrate nanomaterials (nanodots, nanowires) in nanoelectronics devices. The first one uses the natural properties of diblock copolymers to create (i) a hexagonal lattice array of vertical PMMA cylinders in a polystyrene (PS) matrix, or (ii) an ordered array of horizontal PMMA cylinders in a PS matrix. These films are then used as deposition and/or etching masks to produce dense lattices of 20 nm diameter nanoparticles and nanowires with a density of around 1011 cm-2. The chapter presents examples of integration with an 8-inch wafer memory technology. The second technology is based on chemical vapor deposition (CVD) of basic nanomaterial building blocks for future microelectronics. The chapter focuses on CVD growth of silicon nanostructures using a fully compatible CMOS process. The resulting nano-objects are integrated in test devices and measured electrically.
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hal-00461115 , version 1 (13-10-2022)

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Attribution - CC BY 4.0

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Thierry Baron, Claire Agraffeil, Florian Dhalluin, Martin Kogelschtaz, Gilles Cunge, et al.. Emerging Nanotechnology for integration of Nanostructures in Nanoelectronic devices. 2009 Advanced Research Workshop (FTM-6) Future Trends in Microelectronics: Unmapped Roads, 2009, Sardinia, Italy. ⟨10.1002/9780470649343.ch14⟩. ⟨hal-00461115⟩
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