This document presents my research activities since my recruitment at the University of Nantes in September 2004. These activities were successively carried out within the IREENA laboratory (Institute for Research in Electronics and Electrotechnics of Nantes Atlantique) until 2012, then within the IETR laboratory (Institute of Electronics and Digital Technologies). The scope of these activities corresponds to the design of hardware and software architectures of embedded electronic systems. In this context, my research activities have focused on the definition of methods favouring the modelling and simulation of hardware and software architectures in order to optimize them under time, cost and energy constraints. In this document, during the presentation of each of the covered topics, I report on the framework of this work, the nature of the contributions made and the approach undertaken. In doing so, I also explain my role in the supervision of the students who participated and contributed to this work and more broadly the collaborations set up. This synthesis tries to reconcile clarity and precision of the explanations. This document has three main parts. The first part corresponds to a detailed CV, summarizing in particular my professional experience with regard to the various activities carried out in research and teaching. The second part details in five chapters the research activities carried out since obtaining the doctoral degree, retracing the most significant results. Finally, the third part presents an assessment of the activities carried out and establishes a potential research program taking into account the identified prospects. Attached to this document is a detailed list of my publications.