A synchronverter-based magnitude phase-locked loop - Archive ouverte HAL
Article Dans Une Revue IEEE Transactions on Control Systems Technology Année : 2025

A synchronverter-based magnitude phase-locked loop

Florian Reissner
George Weiss

Résumé

A magnitude phase-locked loop (MPLL) is a system that synchronizes its output signal in frequency, phase, and magnitude with the dominant sinusoidal component of its input signal. We propose a novel MPLL design based on the model of a synchronverter (i.e., an inverter that behaves towards the power grid like a synchronous generator). The synchronverter model is detached from its usual three-phase power electronics environment, and transformed into a (single phase) MPLL with a wide pull-in range and great noise rejection properties. We prove synchronization under reasonable conditions. Extensive simulation results are provided to validate its performance, and to compare it with existing solutions.
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Dates et versions

hal-04666880 , version 1 (02-08-2024)

Identifiants

Citer

Pietro Lorenzetti, Florian Reissner, George Weiss. A synchronverter-based magnitude phase-locked loop. IEEE Transactions on Control Systems Technology, In press, ⟨10.1109/TCST.2024.3433228⟩. ⟨hal-04666880⟩
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