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Communication Dans Un Congrès Année : 2024

CMOS Gate Driver with Integrated Gate Current Monitoring Method for Fault Under Load Short Circuit Detection of SiC Power Modules

Anas El Boubkari
  • Fonction : Auteur
  • PersonId : 1401720
Nicolas Rouger
Frédéric Richardeau
Pierre Calmes
  • Fonction : Auteur
  • PersonId : 1401721
Matthew Bacchi
  • Fonction : Auteur
  • PersonId : 1401722
Marc Cousineau
Jean‐marc Blaquiere
Sébastien Vinnac

Résumé

Existing literature has primarily focused on using gate signals for short-circuits type I detection (Hard Switch Fault, HSF) replacing the traditional desaturation method and eliminating external components (high-voltage Diode). However, an unaddressed aspect remains in detecting short-circuit type II (Fault Under Load, FUL). This article introduces a Gate-Driver (GD) IC with a fully integrated approach for the FUL detection. This solution strategically uses the gate current copy (Igcopy), enabling ultra-fast FUL detection. Experimental results demonstrate reliable fast short-circuit detections for power modules, in less than 100ns. This IC is fabricated using NXP Semiconductors’ high-voltage SMARTMOS10 130nm CMOS SOI technology. The integration of these complementary detection methods (HSF & FUL) in the High-Side and Low-Side SiC MOSFET (for power modules) GDs effectively addresses the challenge of ensuring a full Half-Bridge protection system.
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Dates et versions

hal-04647315 , version 1 (14-07-2024)

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Citer

Anas El Boubkari, Nicolas Rouger, Frédéric Richardeau, Pierre Calmes, Matthew Bacchi, et al.. CMOS Gate Driver with Integrated Gate Current Monitoring Method for Fault Under Load Short Circuit Detection of SiC Power Modules. 2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Jun 2024, Bremen, Germany. pp.454-457, ⟨10.1109/ISPSD59661.2024.10579581⟩. ⟨hal-04647315⟩
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