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Communication Dans Un Congrès Année : 2018

Design, Synthesis and Application of A Novel Approximate Adder

Résumé

Approximate computing is a new design paradigm in VLSI design and test. It can improve the performance of error-tolerant applications at the expense of slight loss in computational accuracy. In this paper, we propose a novel approximate adder with a hybrid structure (HYB-adder) which produces results of different precision. The proposed adder is synthesized by utilizing 28nm FD-SOI (fully-depleted silicon-on-insulator) technology. The proposed HYB-adder outperforms existing approximate adder designs regarding mean error distance with comparable area, delay and power consumption. The efficiency is also validated by its application in DCT/IDCT procedures.
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Dates et versions

hal-04477695 , version 1 (26-02-2024)

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Tian Ban, Baokun Wang, Lirida Naviner. Design, Synthesis and Application of A Novel Approximate Adder. 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2018, Windsor, Canada. pp.488-491, ⟨10.1109/MWSCAS.2018.8624023⟩. ⟨hal-04477695⟩
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