Ultrahigh-Density 3-D Vertical RRAM With Stacked Junctionless Nanowires for In-Memory-Computing Applications - Archive ouverte HAL Accéder directement au contenu
Article Dans Une Revue IEEE Transactions on Electron Devices Année : 2020

Ultrahigh-Density 3-D Vertical RRAM With Stacked Junctionless Nanowires for In-Memory-Computing Applications

Résumé

The Von-Neumann bottleneck is a clear limitation for data-intensive applications, bringing In-Memory Computing (IMC) solutions to the fore. Since large data set are usually stored in Non-Volatile Memory (NVM), various solutions have been proposed based on emerging memories, such as OxRAM, that rely mainly on area hungry, one transistor (1T) one OxRAM (1R) bit-cell. To tackle this area issue, whereas keeping the programming control provided by 1T1R bit-cell, we propose to combine Gate-All-Around stacked junctionless nanowires (1JL), and OxRAM (1R) technology to create a 3D memory pillar with ultra-high-density. Nanowire junctionless transistors have been fabricated, characterized, and simulated to define current conditions for the whole pillar. Finally, based on SPICE simulations, we demonstrated successfully scouting logic operations up to three-pillar layers, with one operand per layer.
Fichier principal
Vignette du fichier
MEZZADEEN_TED20.pdf (1.73 Mo) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)

Dates et versions

hal-04442663 , version 1 (06-02-2024)

Identifiants

Citer

M. Ezzadeen, D. Bosch, B. Giraud, S. Barraud, J. -P. Noel, et al.. Ultrahigh-Density 3-D Vertical RRAM With Stacked Junctionless Nanowires for In-Memory-Computing Applications. IEEE Transactions on Electron Devices, 2020, 67 (11), pp.4626-4630. ⟨10.1109/TED.2020.3020779⟩. ⟨hal-04442663⟩
15 Consultations
13 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More