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Communication Dans Un Congrès Année : 2023

Integrated test circuit for off-state dynamic drain stress evaluation

Résumé

Dynamic off-state stress for RF applications is investigated via integrated test circuits to enable GHz level testing. We have performed characterization of test circuits to ensure the dynamic stress signal waveform integrity, which is verified against model simulation data. We report a x2 gain on time-to-breakdown at 1GHz against DC TDDB off-state stress. Based on extraction of $I_{Dlin}$ degradation, no frequency effect is observed from DC to 1GHz off-state stress conditions. Modeling of on-state and off-state interactions based on sum of degradations modes is then demonstrated and supported by experimental data.

Domaines

Electronique
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Origine : Publication financée par une institution

Dates et versions

hal-04105262 , version 1 (08-04-2024)

Licence

Paternité - Pas d'utilisation commerciale

Identifiants

Citer

Joycelyn Hai, Florian Cacho, Xavier Federspiel, Tidjani Garba-Seybou, Alexis Divay, et al.. Integrated test circuit for off-state dynamic drain stress evaluation. IRPS 2023 - IEEE International Reliability Physics Symposium, Mar 2023, Monterey, United States. pp.10.1109/IRPS48203.2023.10117885, ⟨10.1109/IRPS48203.2023.10117885⟩. ⟨hal-04105262⟩
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