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Communication Dans Un Congrès Année : 2012

Design and characterization of a novel 3.3 kV 4H-SiC JFET

Résumé

This paper presents the methodology for the design of a novel 4H-SiC JFET structure able to sustain 3.3 kV. Comparisons between simulation and characterization res will be made. Taken into account the process limitation, we will also discuss the critical steps and their impact on the electrical characteristics. A design methodology based on Baliga's criterion is proposed to obtain the optimal structure. A 50 nm thick thermal oxide grown above vertical channel and the use of a buried p+ layer as second gate electrode are brand new in front of what is found in literature.
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Dates et versions

hal-04048180 , version 1 (27-03-2023)

Identifiants

  • HAL Id : hal-04048180 , version 1

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Florian Chevalier, Pierre Brosselard, D. Tournier, Grégory Grosset, Lionel Dupuy, et al.. Design and characterization of a novel 3.3 kV 4H-SiC JFET. Proceedings of the 2012 European Conference on Silicon Carbide and Related Materials ECSCRM, Sep 2012, Saint-Pétersbourg, Russia. 4p. ⟨hal-04048180⟩
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