Vibration Reduction Controller for a Switched Reluctance Machine Based on HW/SW Partitioning
Résumé
This article presents a hardware/software implementation for the vibration reduction control of a switched reluctance machine (SRM). A mixed partitioning-based architecture is proposed to make full use of both microprocessor and field-programmable gate array (FPGA) resources. The aim of the proposed controller is to control directly the radial forces in the stator teeth allowing a significant vibration reduction compared to regular controller applied to SRM. However, if the control is software-only implemented, it suffers from performance degradation due to the high execution time required by this implementation solution. For this reason, the control system implementation is partitioned. The speed control is implemented using a microprocessor, while the current control and direct force control are implemented in FPGA. This solution provides high dynamic response especially needed to control the radial force and the currents. The effectiveness of the hybrid implementation is verified by experimental results.