Critical clearing time determination and enhancement of grid-forming converters embedding virtual impedance as current limitation algorithm - Archive ouverte HAL
Article Dans Une Revue IEEE Journal of Emerging and Selected Topics in Power Electronics Année : 2019

Critical clearing time determination and enhancement of grid-forming converters embedding virtual impedance as current limitation algorithm

Résumé

The present paper deals with the post-fault synchronization of a voltage source converter based on the droop control. In case of large disturbances on the grid, the current is limited via current limitation algorithms such as the virtual impedance. During the fault, the power converter internal frequency deviates resulting in a converter angle divergence. Thereby, the system may lose the synchronism after fault clearing and which may lead to instability. Hence, this paper proposes a theoretical approach to explain the dynamic behavior of the grid forming converter subject to a three phase bolted fault. A literal expression of the critical clearing time is defined. Due to the precise analysis of the phenomenon, a simple algorithm can be derived to enhance the transient stability. It is based on adaptive gain included in the droop control. These objectives have been achieved with no external information and without switching from one control to the other. To prove the effectiveness of the developed control, experimental test cases have been performed in different faulted conditions.
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Dates et versions

hal-02432758 , version 1 (08-01-2020)

Identifiants

Citer

Taoufik Qoria, Francois Gruson, Frederic Colas, Guillaume Denis, Thibault Prevost, et al.. Critical clearing time determination and enhancement of grid-forming converters embedding virtual impedance as current limitation algorithm. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2019, pp.12. ⟨10.1109/JESTPE.2019.2959085⟩. ⟨hal-02432758⟩
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