Three multi-terminal silicon power chips for an optimized monolithic integration of switching cells: validation on an H-bridge inverter - Archive ouverte HAL
Article Dans Une Revue IEEE Transactions on Electron Devices Année : 2019

Three multi-terminal silicon power chips for an optimized monolithic integration of switching cells: validation on an H-bridge inverter

Résumé

This article deals with the monolithic integration in silicon of a multiphase static power converter (dc/ac or ac/dc) for medium power applications, from few kilowatts to few tens of kilowatts with power devices' blocking capability in the range of 600-1200 V. This article presents an original three-chip integration approach that combines both monolithic integration in silicon and printed circuit board (PCB) packaging process and takes advantage of both silicon-level technology and PCB-level technology within a limited and well-mastered complexity. The converter is integrated within only three new multiterminal power chips, which are then judiciously packaged on a PCB so as to minimize the switching cell stray inductance and the impact of voltage variations (dv/dt) across the common-mode stray capacitance of the assembly. The static and the dynamic operating modes of the proposed multiterminal power chips were validated using 2-D-Sentaurus TCAD simulations. The realized chips were packaged on a PCB to realize both classical and three-chip-based H-bridge inverters. First characterization results validate the electrical operating modes of the H-bridge inverter realized according to the three-chip approach.
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Dates et versions

hal-02334407 , version 1 (18-10-2020)

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Adem Lale, Abdelhakim Bourennane, Frédéric Richardeau, Nicolas Videau. Three multi-terminal silicon power chips for an optimized monolithic integration of switching cells: validation on an H-bridge inverter. IEEE Transactions on Electron Devices, 2019, 66 (12), pp.5238 - 5245. ⟨10.1109/TED.2019.2946749⟩. ⟨hal-02334407⟩
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