Certified and efficient instruction scheduling. Application to interlocked VLIW processors. - Archive ouverte HAL Access content directly
Journal Articles Proceedings of the ACM on Programming Languages Year : 2020

Certified and efficient instruction scheduling. Application to interlocked VLIW processors.

Cyril Six
Sylvain Boulmé
David Monniaux

Abstract

CompCert is a moderately optimizing C compiler with a formal, machine-checked, proof of correctness: after successful compilation, the assembly code has a behavior faithful to the source code. Previously, it only supported target instruction sets with sequential semantics, and did not attempt reordering instructions for optimization. We present here a CompCert backend for a VLIW core (i.e. with explicit parallelism at the instruction level), the first CompCert backend providing scalable and efficient instruction scheduling. Furthermore, its highly modular implementation can be easily adapted to other VLIW or non-VLIW pipelined processors.
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Dates and versions

hal-02185883 , version 1 (16-07-2019)
hal-02185883 , version 2 (06-10-2020)
hal-02185883 , version 3 (23-11-2020)

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Cyril Six, Sylvain Boulmé, David Monniaux. Certified and efficient instruction scheduling. Application to interlocked VLIW processors.. Proceedings of the ACM on Programming Languages, 2020, OOPSLA 2020, pp.129. ⟨10.1145/3428197⟩. ⟨hal-02185883v3⟩
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