Ultra-fast and high-reliability SOT-MRAM: from cache replacement to normally-off computing - Archive ouverte HAL Access content directly
Journal Articles IEEE Transactions on Multi-Scale Computing Systems Year : 2016

Ultra-fast and high-reliability SOT-MRAM: from cache replacement to normally-off computing

Mojtaba Ebrahimi
Olivier Boulle
Gilles Gaudin

Abstract

This paper deals with a new MRAM technology whose writing scheme relies on the Spin Orbit Torque (SOT). Compared to Spin Transfer Torque (STT) MRAM, it offers a very fast switching, a quasi-infinite endurance and improves the reliability by solving the issue of “read disturb”, thanks to separate reading and writing paths. These properties allow introducing SOT at all-levels of the memory hierarchy of systems and adressing applications which could not be easily implemented by STT-MRAM. We present this emerging technology and a full design framework, allowing to design and simulate hybrid CMOS/SOT complex circuits at any level of abstraction, from device to system. The results obtained are very promising and show that this technology leads to a reduced power consumption of circuits without notable penalty in terms of performance.
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Dates and versions

hal-01864485 , version 1 (14-02-2022)

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Cite

Guillaune Prenat, Kotb Jabeur, Pierre Vanhauwaert, Gregory Di Pendina, Fabian Oboril, et al.. Ultra-fast and high-reliability SOT-MRAM: from cache replacement to normally-off computing. IEEE Transactions on Multi-Scale Computing Systems, 2016, 2 (1), pp.49 - 60. ⟨10.1109/TMSCS.2015.2509963⟩. ⟨hal-01864485⟩
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