Heterogeneous computing system platform for high-performance pattern recognition applications
Résumé
We present a system architecture made of a motherboard with a Xilinx Zynq System on Chip (SoC) and a mezzanine board equipped with an Associative Memory chip (AM). The proposed architecture is designed to serve as an accelerator of general purpose algorithms based on pipeline processing and pattern recognition. We present the open source software and firmware developed to fully exploit the available communication channels between the ARM CPU and the FPGA using Direct Memory Access (DMA) technique and the AM using Multi-Gigabit Transceivers (MGT). We report the measured performances and discuss potential applications and future developments. The proposed architecture is compact, portable and provide a large communication bandwidth between components.
Mots clés
communication channel
FPGA
direct memory access
DMA
multigigabit transceiver
MGT
Field programmable gate arrays
Program processors
Linux
Computer architecture
Communication channels
Central Processing Unit
Standards
content-addressable storage
field programmable gate arrays
file organisation
firmware
parallel processing
pattern recognition
pipeline processing
public domain software
system-on-chip
heterogeneous computing system platform
high-performance pattern recognition application
Xilinx Zynq system on chip
SoC
associative memory chip
AM
mezzanine board
open source software
ARM CPU