Automatic, Abstracted and Portable Topology-Aware Thread Placement - Archive ouverte HAL
Communication Dans Un Congrès Année : 2017

Automatic, Abstracted and Portable Topology-Aware Thread Placement

Résumé

Efficiently programming shared-memory machines is a difficult challenge because mapping application threads onto the memory hierarchy has a strong impact on the performance. However, optimizing such thread placement is difficult: architectures become increasingly complex and application behavior changes with implementations and input parameters, e.g problem size and number of threads. In this work, we propose a fully automatic, abstracted and portable affinity module. It produces and implements an optimized affinity strategy that combines knowledge about application characteristics and the platform topology. Implemented in the back-end of our runtime system (ORWL), our approach was used to enhance the performance and the scalability of several unmodified ORWL-coded applications: matrix multiplication, a 2D stencil (Livermore Kernel 23), and a video tracking real world application. On two SMP machines with quite different hardware characteristics, our tests show spectacular performance improvements for these unmodified application codes due to a dramatic decrease of cache misses and pipeline stalls. A comparison to reference implementations using OpenMP confirms this performance gain of almost one order of magnitude.
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Dates et versions

hal-01621936 , version 1 (25-10-2017)

Identifiants

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Jens Gustedt, Emmanuel Jeannot, Farouk Mansouri. Automatic, Abstracted and Portable Topology-Aware Thread Placement. IEEE Cluster, Sep 2017, Hawaï, United States. pp.389 - 399, ⟨10.1109/CLUSTER.2017.71⟩. ⟨hal-01621936⟩
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