A bit-accurate power estimation simulator for NoCs - Archive ouverte HAL
Poster De Conférence Année : 2017

A bit-accurate power estimation simulator for NoCs

Erwan Moréac
Johann Laurent
Pierre Bomel

Résumé

Context: - Complex many-cores and SoCs contain one (if not several) NoCs. NoC power consumption can represent a significant proportion (40%) of the overall power consumption. Power/energy challenges: - Estimate NoC power consumption at system-level, and bit accurately, without the need for electrical simulations. "Is it possible to shorten the simulation and still get good estimations?" - Design and test new coding strategies to reduce power consumption on links. "What is the energy impact at system-level?" "Is a single coding strategy always the best fit?" - Design space exploration of coding strategies. "Is it realistic in terms of simulation time and precision?
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Dates et versions

hal-01576044 , version 1 (22-08-2017)

Identifiants

  • HAL Id : hal-01576044 , version 1

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Erwan Moréac, Johann Laurent, Pierre Bomel, André Rossi. A bit-accurate power estimation simulator for NoCs. DATE 2017 Design Automation and Test in Europe, Mar 2017, Lausanne, Switzerland. , Design Automation and Test in Europe. ⟨hal-01576044⟩
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