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Communication Dans Un Congrès Année : 2017

Model-driven reliability evaluation for MPSoC design

Résumé

When designing a Multi-Processor System-on-Chip (MPSoC), a very large range of design alternatives arises from a huge space of possible design options and component choices. Literature proposes numerous Design-Space-Exploration (DSE) approaches which mainly focus on cost optimization. In this paper, we present a DSE approach which mainly focuses on the reliability of the whole design. This approach is based on a meta-model of Multi-Processor System-on-Chips (MPSoCs) which integrates the reliability evaluation. We develop a tool that allows designers to describe and optimize their platform based on the proposed meta-model. The results obtained for an MPSoC is presented, including the improved overall reliability of the system thanks to the automatic selection of the fault tolerance strategies for each component.
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Dates et versions

hal-01563212 , version 1 (27-04-2022)

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Tien Thanh Nguyen, Anthony Mouraud, Mathieu Thevenin, Gwenolé Corre, Olivier Pasquier, et al.. Model-driven reliability evaluation for MPSoC design. Conference on Design and Architectures for Signal and Image Processing, Sep 2017, Dresden, Germany. pp.8122115, ⟨10.1109/DASIP.2017.8122115⟩. ⟨hal-01563212⟩
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