A new SIMD iterative connected component labeling algorithm
Résumé
This paper presents a new multi-pass iterative algorithm for Connected Component Labeling. The performance of this algorithm is compared to those of State-of-the-Art two-pass direct algorithms. We show that thanks to the parallelism of the SIMD multi-core processors and an activity matrix that avoids useless memory access, such a kind of algorithm has performance that comes closer and closer to direct ones. This new tiled iterative algorithm has been benchmarked on four generations of Intel Xeon processors: 2×4-core Nehalem, 2×12-core Ivy-Bridge, 2×14-core Haswell and 57-core Knight Corner. Macro meta-programming was used to design a unique code for SSE, AVX2 and KNC SIMD instruction set.
Domaines
Algorithme et structure de données [cs.DS] Architectures Matérielles [cs.AR] Traitement des images [eess.IV] Traitement du signal et de l'image [eess.SP] Vision par ordinateur et reconnaissance de formes [cs.CV] Traitement du signal et de l'image [eess.SP] Arithmétique des ordinateurs Calcul parallèle, distribué et partagé [cs.DC] Génie logiciel [cs.SE] Mathématique discrète [cs.DM] Robotique [cs.RO]| Origine | Fichiers éditeurs autorisés sur une archive ouverte |
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