Fast Prototyping H.264 Deblocking Filter Using ESL Tools
Résumé
This paper presents a design methodology for hardware/software (HW/SW) architecture design using ESL tools (Electronic System Level). From C++ descriptions, our design flow is able to generate hardware blocks running with a software part and all necessary codes to prototype the HW/SW system on Xilinx FPGAs. Therefore we use assistance of high level synthesis tools (Catapult C Synthesis), logic synthesis and Xilinx tools. As application, we developed an optimized Deblocking filter C code, designed to be used as a part of a complete H.264 video coding system. Based on this code, we explored many configurations of Catapult Synthesis to analyze different area/time tradeoffs. Results show execution speedups of 95,5% compared to pure software execution etc.
Mots clés
field programmable gate array
Catapult C synthesis tool
high level synthesis tools
logic synthesis
Xilinx tools
deblocking filter C code
Xilinx FPGA
H.264 video coding system
H.264 deblocking filter
C++ descriptions
electronic system level
Pixel
ESL tools
Hardware
Software
hardware-software architecture design
Field programmable gate arrays
hardware-software codesign
Filtering algorithms
Decoding
filtering theory
Video coding
H.264
Deblocking filter
ESL
Catapult C