Fast Prototyping H.264 Deblocking Filter Using ESL Tools
Résumé
This paper presents a design methodology for hardware/software (HW/SW) architecture design using ESL tools (Electronic System Level). From C++ descriptions, our design flow is able to generate hardware blocks running with a software part and all necessary codes to prototype the HW/SW system on Xilinx FPGAs. Therefore we use assistance of high level synthesis tools (Catapult C Synthesis), logic synthesis and Xilinx tools. As application, we developed an optimized Deblocking filter C code, designed to be used as a part of a complete H.264 video coding system. Based on this code, we explored many configurations of Catapult Synthesis to analyze different area/time tradeoffs. Results show execution speedups of 95,5% compared to pure software execution etc.
Mots clés
- Software
- Catapult C
- ESL
- Deblocking filter
- H.264
- Video coding
- Decoding
- Filtering algorithms
- Catapult C synthesis tool
- H.264 deblocking filter
- electronic system level
- ESL tools
- hardware-software architecture design
- hardware-software codesign
- filtering theory
- field programmable gate array
- Field programmable gate arrays
- high level synthesis tools
- logic synthesis
- Xilinx tools
- deblocking filter C code
- H.264 video coding system
- C++ descriptions
- Pixel
- Hardware
- Xilinx FPGA