Wafer handling during the manufacturing process introduces microcracks and flaws at the wafer edge. This paper aims at determining whether an initial crack would be able to propagate through the silicon active region of power devices when it is subjected to high electrothermal loads during operating conditions or accelerated thermal cycling tests. Failure analysis performed on these power devices has revealed some typical propagation paths. The most critical crack propagation cases (or paths) were determined by finite-element model simulations. The energy release rate has been calculated for different crack lengths, locations, or thermal loads, and then compared with the silicon critical energy release rate. Hence, different critical crack lengths have been determined. The effect of dice design, temperature, or mechanical properties of the materials on crack thresholds has been also investigated.