Communication Dans Un Congrès Année : 2006

Design method and new architecture of sub-harmonic balanced cold FET mixer for MVDS applications

Audrey Martin
Michel Campovecchio
Jean-Christophe Nallatamby
P. Butterworth
  • Fonction : Auteur
Raymond Quéré

Résumé

This paper reports a novel MMIC balanced sub-harmonic cold FET mixer for MVDS applications using 0.15 mum GaAs pHEMT. The mixer, which includes a LO buffer amplifier, was optimized for highly linear up-conversion performance in the 40.5-43.5 GHz RF band, 19.5-20.5 GHz LO band and 2.45-3.45 GHz IF band. A dedicated simulation method has been developed to optimize conversion loss and determine optimum matching. To achieve better (2LO-to-RF) isolation a specific balanced architecture for sub-harmonic mixing has been elaborated. This leads to simulation results of 13 plusmn 0.5dB conversion losses associated to high IF input power at 1dB compression of 17dBm, and (2LO-to-RF) isolation of 40dB

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Dates et versions

hal-00077154 , version 1 (29-05-2006)

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Citer

Audrey Martin, Michel Campovecchio, Jean-Christophe Nallatamby, P. Butterworth, Raymond Quéré. Design method and new architecture of sub-harmonic balanced cold FET mixer for MVDS applications. Integrated Nonlinear Microwave and Millimeter-wave Circuits (INMMIC), Jan 2006, Aveiro, Portugal. pp.90-93, ⟨10.1109/INMMIC.2006.283517⟩. ⟨hal-00077154⟩

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