Comparison of semi empirical modelling of FinFET FPGA ageing based on high stress short time with 20000 hours low stress measures
Résumé
Most of the time, ageing model for digital circuit are based on short time and high stress measurements. Then, ageing is extrapolated in time and for operational condition of use. Does the model correctly predict ageing after several years of use under normal temperature and voltage conditions? This paper presents ageing and measurements of degradation made during more than 20000 hours on an optimized test bench on nine FPGA including 567 ring oscillators each, with different temperature and voltage stresses. In our knowledge, this is the longer ageing test performed on digital circuit. Based on these measures, we compare semi-empirical modelling made with high temperature stresses and short ageing time (1000 hours) with low temperature stresses and long ageing time (20000 hours)
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