Dynamic insertion of instructions dedicated to sidechannel attacks detection
Résumé
Processor performance optimizations such as Out- of-Order or speculative execution are known to be exploited by attackers for malicious purposes. Numerous side-channel attacks have been developed over decades and more recently transient attacks are considered serious threats. As a countermeasure, previous works offered detection methods monitoring hardware performance counters (HPC). In this work we propose to take advantage of dynamic instructions insertion to monitor HPCs and detect side-channel attacks. This approach offers flexibility as it allows to dynamically adapt the events monitored by HPCs to the state of the system. We present MonitoRISC, our light- weight hardware micro-decoding unit used to insert monitoring instructions in the execution flow of a RISC-V core.
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