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Communication Dans Un Congrès Année : 2018

Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement

Résumé

Spin transfer torque magnetic random access memory (STT-MRAM) is one of the most promising candidates for the next-generation nonvolatile memory (NVM). However, as the process dimension and supply voltage continue to decrease, the yield of the sensing amplifier is reduced. In this work, the proposed sensing block with high margin, speed and stability (HMSS) with performance enhancement can be applied to variability emphasized MRAM design. The sensing circuit is implemented with a 28-nm CMOS process and a perpendicular magnetic anisotropy (PMA) magnetic tunnel junctions (p-MTJ) based compact model. Working at low voltage with high speed and yield is the main goal of the designed HMSS sensing amplifier (HMSS-SA). For near-threshold operation, at the voltage of 700 mV, the yield of HMSS-SA is 2.06x by transistor sizing, reaching 4.1%. And the speed is increased by 33% by transistor sizing, reaching 0.09 ns with the power of 18.27 μW. The performance of HMSS drops by 0.85% yield and 0.05 ns speed at 0.7 V compared to the 1 V supply voltage which shows that the proposed HMSS-SA has excellent performance at low supply voltages.
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Dates et versions

hal-04477743 , version 1 (26-02-2024)

Identifiants

Citer

Menglin Han, Hao Cai, Jun Yang, Lirida Naviner, You Wang, et al.. Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement. 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Oct 2018, Chengdu, China. pp.386-389, ⟨10.1109/APCCAS.2018.8605603⟩. ⟨hal-04477743⟩
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