Writing-only in-MRAM computing paradigm for ultra-low power applications - Archive ouverte HAL
Article Dans Une Revue Microprocessors and Microsystems: Embedded Hardware Design Année : 2022

Writing-only in-MRAM computing paradigm for ultra-low power applications

Résumé

In-memory computing (IMC) is demonstrated as a breakthrough in terms of few interconnection delay and high density. Computing in nonvolatile memory, e.g., spin-transfer-torque (STT)-MRAM, is expected to realize near-zero leakage power consumption and unlimited endurance. Based on circuit-level reconfiguration, we propose a in-MRAM computing scheme to perform data storage and Boolean arithmetic simultaneously. This proposed scheme is implemented with a 28-nm CMOS process and a 40-nm Magnetic tunnel junction (MTJ) compact model. The self-write-termination method achieves 84.7% writing energy saving within 20-ns write access duration. A high-level simulation is performed with pixels image similarity analysis. It demonstrates 24% dynamic energy reduction comparing to the previous method. The proposed in-MRAM computing scheme is also applicable to other resistive memories with the identical bit-cell structure.
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Dates et versions

hal-04420915 , version 1 (27-01-2024)

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Bo Liu, Mingyue Liu, Yongliang Zhou, Xiaofeng Hong, Hao Cai, et al.. Writing-only in-MRAM computing paradigm for ultra-low power applications. Microprocessors and Microsystems: Embedded Hardware Design , 2022, 90, pp.104449. ⟨10.1016/j.micpro.2022.104449⟩. ⟨hal-04420915⟩
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