This work details a new way to deal with the Multiple-Cell Upsets (MCU) in SRAM memories for space applications. The method consists of spatially interleaving a memory plan with a network of memory radiation detectors. As a proof-of-concept, a prototype circuit composed of the radiation detectors was manufactured in the 350 nm CMOS Process Technology and tested considering two methodologies: electrically-induced SEU/MCU testing and SEE laser testing. Silicon measurement results confirm the correct operation of the circuit, detecting single and multiple events inserted in different positions of the evaluated detection plans. According to the ratio between the number of data and detection cells, the method proposed can provide a probability of detecting MCUs in a memory plan that can reach close to 100%.