Impedance Standard Substrate EM-Simulation for On-Wafer GSG Probing
Résumé
The semiconductor industry is experiencing remarkable growth, driven by the constant demand for faster and reliable electronics [1]. Expansion of the Internet of Things (IoT) and the evolution of 5G networks calls for new mm-wave and THz technologies. S-parameter measurements and calibration techniques come as a critical step in understanding device behaviour at high frequencies, especially for on-wafer devices with extreme impedances [2]–[5]. Electromagnetic simulation plays a significant role in this understanding. Simulation tools allow for virtual analysis of devices behaviour, hence, potentially helping optimize designs and predict technical locks before physical implementation. Authors in [6] and [7] explored some guidelines for the design and characterization of calibration substrates. In this work, we used a scanning electron microscope (SEM) to obtain the physical dimensions of the 101−190 C Impedance Standard Substrate (ISS) from FormFactor®. The ISS was implemented in CST® Studio Suite. Lastly, we simulated the reflection coefficient of a non-perfect 50 Ω load and compared it to actual measurements.