1S1R Sub-threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation
Résumé
This paper presents an outlook of Crossbar memory array capabilities while operated in the sub-threshold regime. By means of experimental data obtained on a RRAM resistive device co-integrated in series with an OTS back-end selector, the pertinence of 1S1R sub-threshold read operation for both standard Binarized Neural Networks (BNNs) and Binarized Spiking Neural Networks (B`SNNs) inference implementation in hardware is elucidated.
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