High buffer chains consumption is a serious impediment, particularly for low power and energy harvesting systems. In this paper, we present a novel approach named CGTx (Control Gate Transistor) for designing CMOS butter chains. We introduce two gate control transistors that separate and regulate the pull-up and pull-down transistor gates. This configuration reduces short-circuit leakage which helps to reduce total power consumption. This proposed technique is compared to the LECTOR (LEakage Control TransistOR) technique and conventional inverter gate in terms of leakage power during switching for a single inverter gate and total power consumption for a chain of six inverters. The total consumption for a chain of six inverters with high drive capacitance using CGTx inverters is 4% lower compared to conventional inverters and 28% lower compared to LECTOR technique.