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Article Dans Une Revue International Journal of Circuit Theory and Applications Année : 2021

Implementation of Scale Invariant Feature Transform detector on FPGA for low‐power wearable devices for prostheses control

Résumé

In this paper we describe an FPGA implementation of the Scale Invariant Feature Transform (SIFT) algorithm. The FPGA is required as its a lightweight device which makes it ideal for vision‐guided hybrid neuro‐prostheses utilised for upper limbs replacement. SIFT point detection is needed for computation of coordinates of the object‐to‐grasp in a wearable multi‐camera system. A modified SIFT algorithm is proposed and an implementation of it into C/C++ language on Xilinx ZCU102 FPGA board. The proposed hybrid hardware/software solution is compared to other hardware or hybrid implementations of the SIFT algorithm and with the baseline software detector OpenSIFT. The algorithm optimised for FPGA gives an average precision of 0.84 and the average recall of 0.94 in SIFT‐point detection compared to the baseline. The proposed solution has lower dissipated power than other solutions like CPU or GPU …

Dates et versions

hal-04098169 , version 1 (15-05-2023)

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Attila Fejér, Zoltán Nagy, Péter Szolgay, Aymar Rugy, Jean‐philippe Domenger, et al.. Implementation of Scale Invariant Feature Transform detector on FPGA for low‐power wearable devices for prostheses control. International Journal of Circuit Theory and Applications, 2021, 49 (7), pp.2255-2273. ⟨10.1002/cta.3025⟩. ⟨hal-04098169⟩

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