Investigation into Cu diffusion at the Cu/SiO2 hybrid bonding interface of 3D stacked integrated circuits - Archive ouverte HAL
Article Dans Une Revue Microelectronics Reliability Année : 2023

Investigation into Cu diffusion at the Cu/SiO2 hybrid bonding interface of 3D stacked integrated circuits

Résumé

Reliability concerns are often risen for the hybrid bonding integration due to a potential misalignment in the bonding step leading that Cu directly faces dielectric at the hybrid bonding interface. Any Cu atomic or ionic diffusion could lead to serious decrease of the product lifetime. In the case of Cu/SiO2 interface, a self-formed cuprous oxide (Cu2O) layer that has some diffusion barrier characteristics was previously evidenced in the critical region where Cu is facing SiO2. In this paper, we investigate the immunity to both thermal (atomic) and field-enhanced Cu ion diffusion of the self-formed Cu2O barrier for the Cu/SiO2 hybrid bonding integration. The study of thermal diffusion by high precision analysis techniques shows limited Cu traces after bonding annealing. The same levels of Cu were also found in the presence of a SiN barrier. This study proves that the self-formed cuprous oxide and SiN have similar characteristics in decelerating Cu atomic diffusion. In addition, the study of the field-enhanced diffusion confirms that Cu2O is an effective barrier to Cu ionic drift even after long-term storage, which is chemically validated by a thermally stable interface. This self-formed Cu2O layer provides a negligible impact of Cu diffusion on the device performance.
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Dates et versions

hal-04053545 , version 1 (31-03-2023)

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Bassel Ayoub, Sandrine Lhostis, Stephane Moreau, Jean-Gabriel Mattei, Anna Mukhtarov, et al.. Investigation into Cu diffusion at the Cu/SiO2 hybrid bonding interface of 3D stacked integrated circuits. Microelectronics Reliability, 2023, 143, pp.114934. ⟨10.1016/j.microrel.2023.114934⟩. ⟨hal-04053545⟩
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