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Communication Dans Un Congrès Année : 2022

QoS aware design-time/run-time manager for FPGA-based embedded systems

Résumé

Due to their performance and flexibility, dynamically reconfigurable FPGA-based systems on chip find their uses in industry. Those architectures require dynamic context management of their computing resources to adapt to their environment. Our manager dynamically changes the application quality scenarios to fulfill the system’s constraints. Based on a hardware and software execution model, resources’ mapping and schedule can be switched at runtime to maximize quality of service and guarantee the service execution. In this work we intend to design such a manager with maximization of user-defined quality of service (QoS) in constrained environments and focus on continuity of service. The designed manager has been verified within a simulated environment and profiled data from an actual implementation of an H264 encoder. Results show the manager can make the targeted application run in constrained environment at the highest modeled QoS achievable without service breaks.
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Dates et versions

hal-03520377 , version 1 (11-01-2022)

Identifiants

  • HAL Id : hal-03520377 , version 1

Citer

Alexis Duhamel, Sébastien Pillement. QoS aware design-time/run-time manager for FPGA-based embedded systems. Workshop on Design and Architectures for Signal and Image Processing (DASIP 2022), Jun 2022, Budapest, Hungary. #paper 4. ⟨hal-03520377⟩
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