Thermoelectricity struggles with the lack of cheap, abundant, and environmentally friendly materials. Silicon could overcome this deficiency by proposing high harvested power density, simplicity, availability, harmlessness, CMOS compatibility, and cost reduction. However, despite its high Seebeck coefficient and electrical conductivity, silicon is an inefficient thermoelectric material due to a high thermal conductivity (kappa). Modern nanofabrication techniques enable reduction of kappa in silicon through attenuation of thermal phonons. In this letter, the design and the fabrication of nanostructured material onto kappa measurement platforms are presented. The proposed fabrication process is versatile and ensures compatibility with CMOS technologies. The proposed devices enable precise. measurement owing to a careful management of thermal losses. Characterization resulted in a two-fold (kappa = 59 +/- 10 W/m/K) reduction below bulk value for a 54-nm-thick plain silicon membranes. Further reduction is measured at kappa = 34.5 +/- 7.5 W/m/K for membranes with phononic crystals.