Analysis and Implementation of OVSF Address Decoders - Archive ouverte HAL
Article Dans Une Revue IEEE Transactions on Circuits and Systems II: Express Briefs Année : 2022

Analysis and Implementation of OVSF Address Decoders

Résumé

Demand for Internet of Things (IoT) devices has generated interest in fault-tolerant address decoders. Address decoders affect the energy required to establish a data link and monitor a wireless channel through metrics such as detection probability and false alarm probability. This brief establishes a framework for calculating detection and false alarm probabilities and shows that limiting the number of correctable errors eliminates simultaneous false alarms, reduces the probability of false alarm, and reduces the maximum normalized power consumption of a sleep node due to false alarms by 16.9 dB. The probability expressions are formulated so that the detection probability, the false alarm probability, the energy to transmit, and the power to monitor a channel can be adjusted digitally, yielding a counter-based implementation that reduces the energy consumption of the address decoder to 1.3 pJ/bit for a data rate of 200 bps in 0.18 μm CMOS
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Dates et versions

hal-03249896 , version 1 (13-10-2022)

Identifiants

Citer

Jack Ou, Brendon Palmer, Laurence Hou, Pietro Maris Ferreira. Analysis and Implementation of OVSF Address Decoders. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69 (1), ⟨10.1109/TCSII.2021.3090307⟩. ⟨hal-03249896⟩
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