An Analytical Approach for the Estimation of the Far-Field Reduction Obtained by Placing Closed Conductor Loops in Proximity to a Chip - Archive ouverte HAL Accéder directement au contenu
Article Dans Une Revue IEEE Transactions on Electromagnetic Compatibility Année : 2021

An Analytical Approach for the Estimation of the Far-Field Reduction Obtained by Placing Closed Conductor Loops in Proximity to a Chip

Résumé

A recent study proposed a technique to mitigate the far-field emission and susceptibility of printed circuit boards (PCBs) with the use of a suspended metal loop. This article provides, with the help of the small-loop theory, a methodology to analytically predict and further estimate the electromagnetic field (EMF) distribution and level at very large distances from the emitting PCB (as is the case for CISPR radiated emission measurements up to 10 m test distances), where full-wave simulations and experiments are very challenging (if not impossible as a practical matter). The suitability of the methodology was assessed for various radiator size and frequency as well as the loop radius and configuration with respect to the emitting PCB. As proof-of-concept, full-wave simulations and measurements have been performed. The root-mean-squared error (RMSE) was considered as the measure of the accuracy between the analytical and full-wave numerical results. It has been demonstrated that, whatever the loop radius and/or position with respect to the radiating integrated circuit (IC), the proposed methodology can approximate the far-field EMFs with low RMSE values. Moreover, as far as the emitting IC is concerned, independently of its size and radiating frequency (except near the loop resonance), a good precision was achieved with the analytical model compared to the full-wave numerical analysis. Furthermore, the approach was found to be effective not only on-axis but also off-axis of the suspended conductor loop. Apart from the required computational power for full-wave simulations, thanks to the proposed methodology, it is possible to significantly reduce the huge difference in computational time for numerical ( ≫ 30 min, depending on the distance) and analytical ( Misplaced & few seconds, independently of distance) analyses
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Dates et versions

hal-03245797 , version 1 (02-06-2021)

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Citer

Mohsen Koohestani, Anja K. Skrivervik, Mohamed Ramdani. An Analytical Approach for the Estimation of the Far-Field Reduction Obtained by Placing Closed Conductor Loops in Proximity to a Chip. IEEE Transactions on Electromagnetic Compatibility, 2021, 63 (5), pp.1384-1394. ⟨10.1109/TEMC.2021.3072235⟩. ⟨hal-03245797⟩
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