Reconfigurable computing is solution to optimize the energy efficiency of embedded systems since it allows to dynamically select dedicated hardware accelerators according to the demand of applications. Autonomous vehicles and ADAS systems require high performances under strong SWaP constraints, however they also must be fully reliable so dynamic hardware reconfiguration must be validated. In the HPeC project we consider a multi-level approach that relies on a formal approach to meet this constraint. We propose an autonomic control architecture for self-adaptive and self-reconfigurable FPGA-based embedded systems. The control architecture is structured in three layers: a mission manager, a reconfiguration manager and a scheduling manager. In the talk we will focus on the design of the reconfiguration manager, which is based a design approach using automata-based discrete control.