The Internet of Things (IoT) entails new challenges for the development of wireless transceivers. Radio-frequency building blocks require complex design flows in order to address very different sets of specifications. This paper presents a three-step design methodology dedicated to the synthesis of RF building blocks. Based on the inversion coefficient, the proposed design methodology allows the optimization of the circuit performance for any CMOS process and any application. It is illustrated through the implementation of inductorless low-noise amplifiers (LNA) in three different CMOS nodes: 28-nm fully-depleted silicon-on-insulator (FDSOI), and 65 and 130-nm Bulk. These LNAs are dedicated to two cases of IoT applications: multi-standard and ultra low power. The proposed circuits achieve the state-of-the-art performance for all nodes and applications. Furthermore, the methodology enables an insightful comparison of the capabilities of the different CMOS nodes in terms of power consumption, noise, and bandwidth.