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Communication Dans Un Congrès Année : 2015

Hot carrier degradation modeling of short-channel n-FinFETs

Résumé

Figure 1(a) shows the degradation of the transfer characteristics of a typical FinFET with W fin = 10 nm, measured at V d = 0.03 V after HC stress at V stress = 1.8 V for different stress times. The degradation of the device parameters V t , η and on-state drain current is clearly observed. The positive V t shift indicates the built-up of a negative charge in the gate dielectric. The negative charge can result either from electron trapping in the gate dielectric or from generation of acceptor-type interface traps. Figure 1(b) shows the transconductance g m degradation during HC stress. Degradation of the maximum g m is observed attributed to the interface degradation, with a simultaneous parallel g m shift due to charge injection into the gate dielectric bulk defects [4]. Using the relation SS=(kT/q).qD it /C ox for the subthreshold slope SS, where C ox is the gate oxide capacitance and kT is the thermal energy, from figure 1(a) the extracted interface trap density D it changes from 4×10 12 to 5.5×10 12 cm -2 eV -1 .
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Dates et versions

hal-02049708 , version 1 (26-02-2019)

Identifiants

Citer

I. Messaris, N. Fasarakis, T. Karatsori, A. Tsormpatzoglou, G. Ghibaudo, et al.. Hot carrier degradation modeling of short-channel n-FinFETs. 2015 73rd Annual Device Research Conference (DRC), Jun 2015, Columbus, United States. pp.183-184, ⟨10.1109/DRC.2015.7175617⟩. ⟨hal-02049708⟩
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