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Conference Papers Year : 2019

Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies

Abstract

This paper provides an overview of the challenges faced by hardware implemented Spiking Neural Networks, from device to circuit design, reliability and test. We present a comprehensive description of the state-of-the-art neuromorphic architectures inspired by brain computation, with special emphasis on Spiking Neural Networks (SNNs), together with emerging technologies that have enabled such systems, namely Phase Change and Metal Oxide Resistive Memories. Finally, we discuss the main challenges faced by hardware implementations of SNNs, their reliability and post-fabrication test issues.
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Dates and versions

hal-01961756 , version 1 (20-12-2018)

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Attribution - NonCommercial

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Lorena Anghel, Giorgio Di Natale, Benoit Miramond, Elena Ioana Vatajelu, E. Vianello. Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies. 26th IFIP IEEE International Conference on Very Large Scale Integration (VLSI SOC 2018), Oct 2018, Verona, Italy. pp.176-179, ⟨10.1109/VLSI-SoC.2018.8644897⟩. ⟨hal-01961756⟩
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