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Article Dans Une Revue Microelectronic Engineering Année : 2017

Ultra-low power 1T-DRAM in FDSOI technology

Résumé

A systematic study of a capacitorless 1T-DRAM fabricated in 28 nm FDSOI technology is presented. The operation mechanism is based on band modulation. The Z2-FET memory cell features a large current sense margin and small OFF-state current at 25 °C and 85 °C. Moreover, low power consumption during state ‘1’ writing is achieved with ~ 0.5 V programming voltage. These specifications make the Z2-FET an outstanding candidate for low-power eDRAM applications.
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Dates et versions

hal-01948006 , version 1 (07-12-2018)

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Citer

H. El Dirani, M.S. Parihar, J. Lacord, S. Martinie, J-Ch. Barbe, et al.. Ultra-low power 1T-DRAM in FDSOI technology. Microelectronic Engineering, 2017, 178, pp.245-249. ⟨10.1016/j.mee.2017.05.047⟩. ⟨hal-01948006⟩
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