Synchronous Full-Adder based on Complementary Resistive Switching Memory Cells
Résumé
Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >10 12), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the non-volatility and 3D integration of NVM, both standby power during " idle " state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.
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