Bipolar ReRAM Based Non-­‐Volatile Flip-­‐flops for Low-­‐Power Architectures - Archive ouverte HAL
Communication Dans Un Congrès Année : 2012

Bipolar ReRAM Based Non-­‐Volatile Flip-­‐flops for Low-­‐Power Architectures

Résumé

—Resistive Random Access Memories (ReRAMs) fabricated in the back-end-of-line are a promising breakthrough for including permanent retention mechanisms in embedded systems. This low-cost solution opens the way to advanced power management schemes. In this paper, we propose novel design architecture of a non-volatile flip-flop based on Bipolar ReRAMs (Bi-RNVFF). Compared to state-of-the-art Data-Retention flip-flop (with Balloon latch), the proposed design is 25% smaller due to 6T structure compared to the 8T structure of Data-Retention flip-flop. Moreover, being non-volatile, the proposed architecture exhibits a zero leakage compared to a Data-Retention Flip-Flop, which consumes ~3.2µW in sleep mode (leakage) for a 10K Flip-Flop design implemented in 22nm FDSOI technology. Our simulation results show that Bi-RNVFF is a true alternative for future " Power-on, Power-off " application adding Non-Volatility without significant burdening of the existing architectures.
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Dates et versions

hal-01745498 , version 1 (03-04-2018)

Identifiants

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Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Jean-Michel Portal, Marc Bocquet, et al.. Bipolar ReRAM Based Non-­‐Volatile Flip-­‐flops for Low-­‐Power Architectures. 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS), Jun 2012, Montreal, Canada. ⟨10.1109/NEWCAS.2012.6329045⟩. ⟨hal-01745498⟩
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