Time behavioral model for phase-domain ADPLL based frequency synthesizer
Résumé
In this paper, we present a time behavioral model of a recently proposed phase-domain all-digital phase-locked loop (ADPLL) for RF applications. This model can be easily implemented, and results in a versatile and fast ADPLL simulator that enables to study many aspects of the PLL, e.g. transient responses, steady states, limit cycles, or to perform perturbation analysis. Moreover, we present a baseband analysis that allows computing the power spectral density from the instantaneous frequency obtained as the output of the behavioral model. Simulations illustrate the effectiveness of this new behavioral model.